In semiconductor manufacturing, the 2 nm process is the next MOSFET (metal–oxide–semiconductor field-effect transistor) die shrink after the 3 nm process node.
As of May 2022, TSMC plans to begin 2 nm risk production at the end of 2024 and mass production in 2025; Intel forecasts production in 2024, and Samsung in 2025. The term "2 nanometer" or alternatively "20 angstrom" (a term used by Intel) has no relation to any actual physical feature (such as gate length, metal pitch or gate pitch) of the transistors. According to the projections contained in the 2021 update of the International Roadmap for Devices and Systems published by the Institute of Electrical and Electronics Engineers (IEEE), a "2.1 nm node range label" is expected to have a contacted gate pitch of 45 nanometers and a tightest metal pitch of 20 nanometers.
| Process | Gate pitch | Metal pitch | Year |
|---|---|---|---|
| 7nm | 60nm | 40nm | 2018 |
| 5nm | 51nm | 30nm | 2020 |
| 3nm | 48nm | 24nm | 2022 |
| 2nm | 45nm | 20nm | 2024 |
| 1nm | 42nm | 16nm | 2026 |
As such, "2 nm" is used primarily as a marketing term by the semiconductor industry to refer to a new, improved generation of chips in terms of increased transistor density (a higher degree of miniaturization), increased speed, and reduced power consumption compared to the previous 3 nm node generation
Intel announced its process node roadmap for 2021 and beyond. The company has confirmed a 2nm process node called Intel 20A. "A" refers to the Angstrom, a unit equal to 0.1 nanometers. At the same time, the company introduced a new process node naming scheme that aligned its product names with similar names of its main competitors. Intel's 20A node is expected to be the first node to transition from FinFET to Gate-All-Around Transistor (GAAFET).
